1 ds05-11203-3e fujitsu semiconductor data sheet memory cmos 8m 36 bit synchronous dram module mb85502-012/-015 cmos 8m 36 bit synchronous dram module n description the fujitsu mb85502 is a fully decoded, cmos synchronous dynamic random access memory (sdram) module consisting of eighteen mb81116421 devices which organized as two banks of 2,097,152-word 4-bit. the mb85502 organized as 8,388,608 36-bit is optimized for those applications requiring high speed, high performance, large memory shortage, and high density memory organizations. this module is ideally suited for supercomputers, workstations, laser printers, high resolution graphic adapters, accelerators and other applications where a simple interface is needed. the all inputs/ outputs are lvttl compatible, and supply voltage tolerance is 9%. n absolute maximum ratings (see note) *1 v ss = 0 v note: permanent device damage may occur if the above absolute maximum ratings are exceeded. functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. exposure to absolute maximum rating conditions for extended periods may affect device reliability. parameter symbol value unit supply voltage v cc ?.5 to +4.6 v *1 input voltage v in ?.5 to +4.6 v *1 output voltage v out ?.5 to +4.6 v *1 short circuit output current i out 50 ma power dissipation p d 24 w storage temperature t stg ?5 to +125 c this device contains circuitry to protect the inputs against damage due to high static voltages or electric ?lds. however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
2 mb85502-012/MB85502-015 n product line & features parameter mb85502-012 MB85502-015 clock frequency 84 mhz max. 67 mhz max. burst mode cycle time 12 ns min. 15 ns min. ras access time 71 ns max. 79 ns max. cas access time 36 ns max. 39 ns max. output valid from clock (cl = 3) 13 ns max. 14 ns max. operating current (burst mode) 6199 mw max. 5641 mw max. power down mode current 436 mw max. (add=l) 8m words 36 bits (mb81116421 18) 72 pin socket type (pin pitch 1.27 mm) 84 mhz (max.) data transfer +3.3 v 0.3 v supply voltage 4096 refresh cycles every 65.6 ms dual bank operation lvttl compatible i/o programmable burst type programmable burst length auto and self-refresh cke power down mode output enable and input data mask mss-72p-p70 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 dq 0 dq 2 dq 4 dq 6 v cc dq 9 dq 11 dq 13 dq 14 nc cs 1 a 2 v cc a 10 nc ras we a 5 a 7 a 9 v ss cke 1 clk dqm 0 dq 16 dq 18 dq 20 v ss dq 23 dq 25 dq 26 dq 28 dq 30 dq 32 dq 34 v ss v ss dq 1 dq 3 dq 5 dq 7 dq 8 dq 10 dq 12 v ss dq 15 cs 0 a 3 a 1 a 0 a 11 v ss cas a 4 a 6 a 8 nc cke 0 clk-rtn v cc dqm 1 dq 17 dq 19 dq 21 dq 22 dq 24 v cc dq 27 dq 29 dq 31 dq 33 dq 35 n pin assignment n package 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71
3 mb85502-012/MB85502-015 plane 0 plane 1 clk a 0 to a 11 ras cas we dqm 0 cke 0 cs 0 dqm 1 cke 1 cs 1 dq 5 dq 7 dq 3 dq 1 dq 4 dq 6 dq 2 dq 8 dq 11 dq 12 dq 10 dq 9 dq 14 dq 15 dq 13 dq 16 dq 18 dq 19 dq 17 dq 23 dq 26 dq 27 dq 24 dq 20 dq 22 dq 25 dq 21 dq 28 dq 32 dq 35 dq 30 dq 29 dq 33 dq 34 dq 31 sn74lvt162244 dgg (built-in damping resistor) 4m 4 chip 0 dq 0 clk-rtn functional block diagram dqm cke cs clk ras cas we a 0 to a 11 dq dq dq dq 4m 4 chip 9 dq dq dq dq dqm cke cs clk ras cas we a 0 to a 11 4m 4 chip 1 dqm cke cs clk ras cas we a 0 to a 11 dq dq dq dq 4m 4 chip 10 dq dq dq dq dqm cke cs clk ras cas we a 0 to a 11 4m 4 chip 2 dqm cke cs clk ras cas we a 0 to a 11 dq dq dq dq 4m 4 chip 11 dq dq dq dq dqm cke cs clk ras cas we a 0 to a 11 4m 4 chip 3 dqm cke cs clk ras cas we a 0 to a 11 dq dq dq dq 4m 4 chip 12 dq dq dq dq dqm cke cs clk ras cas we a 0 to a 11 4m 4 chip 4 dqm cke cs clk ras cas we a 0 to a 11 dq dq dq dq 4m 4 chip 13 dq dq dq dq dqm cke cs clk ras cas we a 0 to a 11 4m 4 chip 5 dqm cke cs clk ras cas we a 0 to a 11 dq dq dq dq 4m 4 chip 14 dq dq dq dq dqm cke cs clk ras cas we a 0 to a 11 4m 4 chip 6 dqm cke cs clk ras cas we a 0 to a 11 dq dq dq dq 4m 4 chip 15 dq dq dq dq dqm cke cs clk ras cas we a 0 to a 11 4m 4 chip 7 dqm cke cs clk ras cas we a 0 to a 11 dq dq dq dq 4m 4 chip 16 dq dq dq dq dqm cke cs clk ras cas we a 0 to a 11 4m 4 chip 8 dqm cke cs clk ras cas we a 0 to a 11 dq dq dq dq 4m 4 chip 17 dq dq dq dq dqm cke cs clk ras cas we a 0 to a 11
4 mb85502-012/MB85502-015 n recommended operating conditions *1: v ss = 0 v. *2: ambient temp. depend on cycle time and cooling conditions. note: this figures are recommened value to guarantee lsi? normal operation. requirements of electric characteristics (dc/ad) is guaranteed within this value. n capacitance (t a = 25 c, f = 1 mhz, v cc = +3.3 v) parameter notes symbol value unit ambient oprating temp. min. typ. max. supply voltage *1 v cc 3.0 3.3 3.6 v 0 c to +70 c v ss 000 input high voltage, all in- puts *1 *2 lvttl v ih 2.0 v cc +0.3 v input low voltage, all inputs *1 *2 v il ?.3 0.8 v parameter symbol typ. max. unit input capacitance, a 0 to a 11 c in1 ?6pf input capacitance, ras , cas , we c in2 ?6pf input capacitance, clk c in3 ?6pf input capacitance, dqm 0 , dqm 1 c in4 ?6pf input capacitance, cke 0 , cke 1 c in5 ?6pf input capacitance, cs 0 , cs 1 c in6 ?6pf i/o capacitance, (dq 0 to dq 35 ) c dq ?2pf
5 mb85502-012/MB85502-015 n dc characteristics (recommended operating conditions unless otherwise noted.) (continued) parameter symbol conditions value unit min. max. input leakage current all inputs except dq i li v in = 0 v ?0 10 m a v in = v cc ?0 10 input hold current i i (hold) v in = 0.8 v 75 m a v in = 2 v ?5 output leakage current i lo 0 v v in v cc output high impedance ?0 20 m a output high voltage 1 lvttl v oh i oh = ?.0 ma 2.4 v output low voltage 1 v ol i ol = +2.0 ma 0.4 v operating current (average power supply current) 2 mb85502-012 i cc1s no burst: t ck = min. one bank active 1204 (169) ma MB85502-015 1126 (136) mb85502-012 i cc1d no burst: t ck = min. two banks active 1588 (238) ma MB85502-015 1451 (191) precharge standby current (power supply current) 2 add=fix ? i cc2p cke = v il two banks idle t ck = min. power down mode 121 (103) ma add=fix ? 117 (99) add=change 248 (230) add=fix ? i cc2n cke = v ih two banks idle t ck = min. 641 (102) ma add=fix ? 639 (99) add=change 770 (230) active standby current (power supply current) 2 add=fix ? i cc3p cke = v il one bank active t ck = min. 642 (103) ma add=fix ? 639 (99) add=change 770 (230) add=fix ? i cc3n cke = v ih one bank active t ck = min. 912 (102) ma add=fix ? 909 (99) add=change 1040 (230) burst mode current (average power supply current) 2 mb85502-012 i cc4 t ck = min. 1722 (327) ma MB85502-015 1567 (262)
6 mb85502-012/MB85502-015 n dc characteristics (continued) (recommended operating conditions unless otherwise noted.) 1. v ss = 0 v 2. i cc depends on output pin, load condition and number of clock cycle. note: all ?ures except for i cc2 are value for one side(stand by = i cc2 ) operation. ( ) shows supply consumption of driver, v ih = v cc . add = change is the value of change at burst mode 84 mhz. parameter symbol conditions value unit min. max. refresh current #1 (average power supply current) 2 i cc5s one bank active auto-refresh; t ck = min., t rc =min. add=fix low 1134 (99) ma 1070 (80) i cc5d two banks active auto-refresh; t ck = min. t rc =min., t rrd = min. add=fix low 1463 (113) ma 1351 (91) refresh current #2 (average power supply current) 2 i cc6 self-refresh; cke = v il add=fix low 382 (103) ma mb85502-012 MB85502-015 mb85502-012 MB85502-015
7 mb85502-012/MB85502-015 n ac characteristics (recommended operating conditions unless otherwise noted.) notes 1, 2, 3 * : dq 0 to dq 35 (d in input) parameter notes symbol mb85502-012 MB85502-015 unit min. max. min. max. clock period 4 cas latency = 3 t ck 12 100 15 100 ns cas latency = 2 17.5 20 ns cas latency = 1 35 40 ns clock high time t ch 4? ns clock low time t cl 4? ns cs setup time t sc 3? ns cs hold time t hc 3? ns input setup time t si 3? ns input hold time t hi 3? ns data input setup time* t sid 0? ns data input hold time* t hid 7? ns output valid from clock (t clk = min.) 5, 6 cas latency = 3 t ac 13 14 ns cas latency = 2 18.5 20 ns cas latency = 1 36 39 ns output in low-z t olz 5? ns output in high-z t ohz 417420ns output hold time 7 t oh 4? ns time between refresh t ref 65.6 65.6 ms transition time t t 0.5 2 0.5 2 ns power down exit time t pde 15 18 ns
8 mb85502-012/MB85502-015 n ac characteristics (recommended operating conditions unless otherwise noted.) notes 1, 2, 3 base values for clock count/latency notes: 1. an initial pause (desl on nop) of 200 m s is required after power-up followed by a minimum of eight auto-refresh cycles. 2. 1.4 v or v ref is the reference level for measuring timing of input signals. transition times are measured between v ih (min.) and v il (max.). 3. ac characteristics assume t t = 1 ns and 30 pf of capacitive load. 4. maximum value is a reference value and a device may work at a slower untested clock rate. 5. assumes t rcd and t cac are satis?d. 6. t ac also speci?s the access time at burst mode except for ?st access. 7. speci?d where output buffer is no longer driven. 8. actual clock count of t rc (l rc ) will be sum of clock count of t ras (l ras ) and t rp (l rp ). 9. t rac is a reference value. maximum value is obtained from the sum of t rcd (min.) and t cac (max.). 10. assumes t rac and t ac are satis?d. 11. operation within the t rcd (min.) ensures that t rac can be met; if t rcd is greater than the speci?d t rcd (min.), access time is determined by t cac or t ac . 12. i cac is programmed at mode register. *source: see mb81116421 data sheet for detailes on the electricals. parameter notes symbol mb85502-012 MB85502-015 unit min. max. min. max. ras cycle time 8 t rc 110 120 ns ras access time 9 t rac ?1?9ns cas access time 10, 12 t cac ?6?9ns ras precharge time t rp 40?0 ns ras active time t ras 70 10000 80 10000 ns ras to cas delay time 11 t rcd 35?0 ns write recovery time t wr 20?5 ns ras to cas bank active delay time t rrd 35?0 ns
9 mb85502-012/MB85502-015 n package dimensions +0.10 C0.08 +.004 C.003 1.27 .050 (?.125.002) ?3.180.05 details of "a" part 0.25(.010)max 2.54(.100)min 1.04(.041)typ "a" 5.72(.225)min 4.06(.160)max (1.495.005) 37.970.13 (.050.001) 1.270.03 95.250.05(3.750.002) 6.350.03(.250.001) pin no.1 index 1 (.250.005) 6.350.13 44.450.05(1.750.002) (r.062.002) r1.570.05 (.080.005) 2.030.13 (.400.003) 10.160.08 (.250.005) 6.350.13 r1.570.05(r.062.002) 107.950.13(4.250.005) 101.190.10(3.984.004) 1995 fujitsu limited m72071sc-1-1 c dimensions in mm(inches). 72 pin, plastic simm (mss-72p-p70)
24 fujitsu limited for further information please contact: japan fujitsu limited corporate global business support division electronic devices kawasaki plant, 4-1-1, kamikodanaka nakahara-ku, kawasaki-shi kanagawa 211-88, japan tel: (044) 754-3763 fax: (044) 754-3329 north and south america fujitsu microelectronics, inc. semiconductor division 3545 north first street san jose, ca 95134-1804, u.s.a. tel: (408) 922-9000 fax: (408) 432-9044/9045 europe fujitsu mikroelektronik gmbh am siebenstein 6-10 63303 dreieich-buchschlag germany tel: (06103) 690-0 fax: (06103) 690-122 asia paci? fujitsu microelectronics asia pte. limited #05-08, 151 lorong chuan new tech park singapore 556741 tel: (65) 281-0770 fax: (65) 281-0220 f9703 fujitsu limited printed in japan all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. also, fujitsu is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. fujitsu semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). caution: customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with fujitsu sales representatives before such use. the company will not be responsible for damages arising from such use without prior approval. any semiconductor devices have inherently a certain rate of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade control law of japan, the prior authorization by japanese government should be required for export of those products from japan.
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